Publication date: 15th April 2025
Combinatorial optimization problems (COPs) are prevalent in social life and industry, with applications in computer science, engineering, chemistry, logistics, economics, and more. However, they are notoriously difficult to solve exactly. Analog computing in memristor hardware has shown potential for heuristic solutions, but current demonstrations are limited to series updates due to the constraints of simulated annealing and discrete-time Hopfield neural network models. In this talk, I will introduce our recent efforts in developing analog memristor hardware for efficient optimization problems. First, we propose borrowing concepts from quantum adiabatic annealing to the memristor-based Ising solver, achieving better parallelism by synchronously updating node states. We also adopt a binary neural network-inspired updating algorithm, experimentally demonstrating better efficiency and solution quality. Additionally, we developed a continuous-time version by employing the power minimization principle for natural energy gradient descent. By continuing to push the boundaries of analog computing, we hope to unlock new possibilities in optimization and contribute to advancements in various fields reliant on these complex problem-solving capabilities.
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