Recent announcements from top tier crystalline silicon (c-Si) solar cells manufacturers report record certified power conversion efficiencies (PCE) more than 26.8% for architectures based either on poly-silicon (poly-Si) or silicon heterojunction (SHJ) in front/back contacted (FBC) configuration [1][2]. Also in case of interdigitated back contacted (IBC) configuration, several industrial players have announced in-house measured or certified PCE well above 26.7% and up to 27.1% at cell level [3][4][5] or certified PCE up to 24.9% at module level [6], which very likely implies the deployment of high-efficiency solar cells exhibiting PCE above 26.5%. PERC architecture, which currently dominates the photovoltaic (PV) market, is therefore poised to lose market share soon, first, in favor of the so-called FBC industrial TOPCon architecture [7], then, either to FBC SHJ architecture or to architectures with IBC configuration (high-thermal budget, low-thermal budget, or so-called hybrid architecture). This market dynamics is mostly driven by the lower CAPEX of FBC industrial TOPCon with respect to FBC SHJ architecture or other IBC architectures despite all these newer architectures being capable of exhibiting PCE very close to 27%. Modern manufacturing techniques and outstanding wafer quality enable such record c-Si solar cells, which behave close to the Auger limit [8]. Still within the highest attainable theoretical efficiency [8][9], there is still room to demonstrate efficiencies well above 27%. In the long run, the market will be disrupted by double-junction perovskite/c-Si tandem solar cells, given the quick rise of their conversion efficiency up to 33.9% [10]. However, the current need to move beyond 27% in c-Si single junction solar cells is to cover the time needed to upscale and opportunely industrialize perovskite/c-Si tandem solar cell technology. Therefore, it is of great interest to explore novel c-Si solar cell architectures which can exhibit PCE well above 27%. In this contribution, with the support of advanced numerical simulations [11-14], we study several high-thermal budget, low-thermal budget, and hybrid architectures in both FBC and IBC configurations and discuss their efficiency drivers.

REFERENCES:

[1] Jinko, press release October 2023

[2] H. Lin, et al., Nat. En., 8 (2023)

[3] K. Yoshikawa, et al., SOLMAT, 173 (2017)

[4] Longi, AIKO, GS @ Asian PVSEC 34

[5] LONGi, press release December (2023)

[6] Maxeon, press release March 2024

[7] A. Richter, et al., Nat. En., 6 (2023)

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[9] M. A. Green, Nat. En., 8 (2023)

[10] LONGi, press release November 2023

[11] Synopsys TCAD (2015)

[12] P. Procel, et al., SOLMAT, 186 (2018)

[13] P. Procel, et al., IEEE JPV, 9 (2019)

[14] P. Procel, et al., PiP, 28 (2020)