Publication date: 23rd February 2022
Volatile CMOS compatible memristive devices using the perovskite SrTiO3 (STO) are fabricated for neuromorphic circuits applying concepts such as time perception, optical flow and neuromorphic learning rules. In its crystalline form STO has proofed itself as a sound model system for resistive switching, but the deposition (pulsed laser deposition) usually involves temperatures above 850°C [1],[2],[3]. This makes it not suitable for neuromorphic chips. In this work, a silicon-based metal-insulator-metal structure with a platinum bottom electrode, a polycrstalline/amorphous STO resistive switching layer and a titanium top electrode is presented. The STO is deposited using a low temperature (CMOS compatible) pulsed laser deposition approach. The retention behaviour is investigated and engineered. Special attention is paid to effects such as charge trapping inside the oxide and the oxygen diffusion through the STO/Pt interface, since they offer a way to engineer the device retention time to make them suitable for certain applications operating at different time scales.
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