Proceedings of MATSUS Spring 2025 Conference (MATSUSSpring25)
Publication date: 16th December 2024
Electrolyte-gated transistors (EGTs) exhibit high on-currents at low voltages, enabling low-voltage operation since electrolytes present very high capacitance due to the electrical double layers (EDLs) formed at their interface with the semiconductor. In printed sustainable electronic devices, printing organic materials or nanoparticle-based inks on porous or fibrous, flexible, and biodegradable substrates such as paper, which results in rough surfaces, leading to highly irregular interfaces with carrier traps and other surface phenomena, typically obtain layers of different materials. In such cases, the capacitance may depend on the interface morphology and applied voltage, making it insufficient to consider only the typical EDLs capacitance for calculating the key parameters in device analysis. For these devices, parameters such as capacitance, mobility, threshold voltage, transconductance, the on/off current ratio, and others depend on the interface morphology. In summary, interface processes are crucial for the performance of printed devices, especially the EGTs. Studying these interfaces is important because reactions involving ions from the electrolyte or the semiconductor can result in Faradaic currents or other interactions. This work demonstrates that displacement current measurements (DCM) in an EGT are a crucial complement for studying interface effects and semiconductor properties. Additionally, by varying the drain-to-source distance and associated polarization conditions, as in the transmission line technique, and combining them with the setup used for DCM [1,2], it is possible to obtain not only the output and transfer curves but also the source-to-gate current, also called leakage current. This current, which can be equivalent to DCM measurements under the right conditions [3,4], allows us to explore the effects of carrier traps on device mobility, giving a special complement to the transistor analyses. From these measurements, it is possible to determine the capacitance under the operating conditions of the EGT, that is, during transfer curve measurements, leveraging the gate-source current (or DCM) measured simultaneously with the drain-source current. In this work, EGTs based on biodegradable and sustainable materials are studied, specifically using paper, zinc oxide, honey, and laser-induced graphene (LIG) as the substrate, semiconductor, electrolyte, and electrodes, respectively. The experimental study is complemented with COMSOL simulations, which show the effect of contact resistance combined with geometric factors such as channel length. The experimental results, supported by simulations, demonstrate that contact resistance becomes critical due to the high capacitance, making it difficult to reach the saturation regime in these devices. Additionally, the conditions necessary to achieve this regime are discussed. The results demonstrate that the DCM technique [1,2], combined with transistor configurations featuring different geometries, such as channel length variations in the transmission line technique, is highly relevant for studying EGTs. This method is a simple yet powerful tool for improving the accuracy of EGT parameter determination and for developing printed, electronic transistors based on sustainable materials.
The authors thank Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) (Grants 2023/14843-1, 2022/12332-7, 2021/01161-4), Coordenação de Aperfeiçoamento de Pessoal de Nível Superior-Brasil (CAPES) - Finance Code 001, Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq - 306501/2022-8) and Instituto Nacional de Eletrônica Orgânica (INCT/INEO) for technical and financial support.