Proceedings of MATSUS Spring 2025 Conference (MATSUSSpring25)
Publication date: 16th December 2024
Although resistive switching devices are typically characterized and modeled under ramped voltage stress (RVS), their actual operation generally involves the use of pulsed voltage signals. Consequently, a useful model for process design kits (PDKs) in electronic design automation (EDA) tools should perform reliably under both operation regimes, despite the significantly different time scales they could entail. This challenge is closely linked to what is known as the time-voltage dilemma [1], [2]: the same device must remain stable under low read voltages to function as a non-volatile memory, while it must also be programmable using slightly higher voltages (less than an order of magnitude greater [2]) within short timeframes to operate as a fast programmable memory. These dual characteristics are compatible thanks to the pronounced non-linearity in the kinetics of the switching mechanisms [3]. However, from a modelling viewpoint, this presents a significant challenge: the same model, with consistent parameters, must function accurately across very different time scales. Even minor deviations in the fitting parameters can lead to dramatic changes in responses due to this highly non-linear nature of the switching kinetics. The primary objective of this work is to study reset transitions under different applied voltages, with a focus on identifying the critical dependencies necessary for successfully modelling these transitions over a broad range of time scales or operation regimes.
With the purpose of performing a quantitative characterization of the duration of the reset transitions under pulsed operation, the time to reset parameter (previously introduced in reference [4]) has been defined as the time necessary for reducing the current to the half of its initial value after the application of the voltage pulse. TiN/Ti/HfO2/W memristors were fabricated and experimentally characterized under ramped voltage operation (I-V curves were obtained). After programming the device in the low resistance state, reset transitions were performed under constant voltage stress using different pulse amplitudes (I-t plots) and the corresponding Times to Reset were experimentally obtained [4]. Different modelling approaches have been proposed in order to explain, reproduce and simulate the reset transitions and the corresponding reset times, at the same time that the IV curves, involving different temporal scales, have been also reproduced with the same model parameters.
Research supported by the projects PID2022-139586NB-C42, PID2022-139586NB-C43 and PID2022-139586NB-C44 funded by MCIN/AEI/10.13039/501100011033 and FEDER, EU. The authors also acknowledge the project CR32023-040125 (MICIU/AEI/10.13039/501100011033, EU NextGenerationEU/PRTR), project 2021SGR00497 of Generalitat de Catalunya-AGAUR, and project 20225AT012 (CSIC). MBG also acknowledges the grant RYC2020-030150-I (MICIU/AEI/10.13039/501100011033, ESF 'Investing in your future').