A Scalable Oscillatory Neural Network Architecture Using Analog Resistive Memory for Coupling Elements

Wooseok Choi^a, Thomas van Bodegraven^b, Siegfried Karg^a, Matteo Galetta^a, Victoria Clerico^a, Antonio La Porta^a, Aida Todri-sanial^b, Bert Jan Offrein^a, Valeria Bragaglia^a

^aIBM Research Europe - Zurich, Säumerstrasse 4, 8803 Rüschlikon, Zürich, Switzerland

^bEindhoven University of Technology, Eindhoven, the Netherlands, Het Eeuwsel, 53, Eindhoven, Netherlands

Proceedings of MATSUS Spring 2026 Conference (MATSUSSpring26)

H1 Quantum and Probabilistic Computation

Barcelona, Spain, 2026 March 23rd - 27th

Organizers: Pol Forn-Díaz and Jiyong Woo

Invited Speaker, Wooseok Choi, presentation 454
Publication date: 15th December 2025

Oscillatory neural networks (ONNs), which encode information in the relative phase of coupled oscillators, have emerged as a neuromorphic computing paradigm capable of addressing key limitations of conventional von Neumann architectures, such as limited parallelism and high energy consumption in computing large-scale tasks.[1-3] However, their scalability is challenged by the quadratic increase in coupling elements with network size and the requirement for programmable connectivity to support online learning.

To enable scalable and trainable ONN connectivity, resistive random-access memory (ReRAM) is introduced as the coupling element. ReRAM offers multilevel resistance states, low-power operation, and a compact 4F² footprint, making it an ideal candidate for programmable, dense interconnects. The ReRAM devices used in this work are bilayers whose active layers are composed of a conductive metal oxide (CMO) and a dielectric HfO_x, stacked between TiN electrodes.[4,5] After a one-time soft breakdown forming operation, a metallic filament composed of oxygen vacancies is created in the HfO_x layer. The resistive switching phenomenon is then governed by the redistribution of oxygen ions and vacancies in the CMO layer.[6] This mechanism provides the resistance tunability and stability required for coupling in ONNs.

A few key design constraints must be considered when integrating ReRAM as coupling elements in oscillator networks. Variations in oscillator voltages during computation may inadvertently alter the ReRAM state if voltage excursions exceed critical thresholds. In addition, the non-linear resistance response to applied voltage can lead to deviations in intended coupling strength, potentially degrading computing accuracy. These phenomena necessitate careful design strategies to ensure stable ONN functionality.[7] In this work, we establish a novel ONN architecture that uses ReRAM-based coupling elements, moving beyond traditional CMOS and passive coupling designs. The approach spans materials science, device engineering, circuit design and integration, and includes application-level demonstrations—such as complex optimization and associative memory—on a functional hardware prototype for energy-efficient, neuromorphic computing.

References:

[1] Maher, O., Jiménez, M., Delacour, C., Harnack, N., Núñez, J., Avedillo, M.J., Linares-Barranco, B., Todri-Sanial, A., Indiveri, G. and Karg, S., 2024. A CMOS-compatible oscillation-based VO2 Ising machine solver. Nature Communications, 15(1), p.3334.

[2] Abernot, M., Azemard, N. and Todri-Sanial, A., 2023. Oscillatory neural network learning for pattern recognition: an on-chip learning perspective and implementation. Frontiers in Neuroscience, 17, p.1196796.

[3] Chen, P., Zhang, X., Qiu, J., Li, Y., Jia, S., Cheng, L., Yang, D., Wang, X., Chen, J., Chen, X. and Wang, M., 2025. Thermal Engineering of NbO2‐Based Memristor for Low‐Power and High‐Capacity Oscillatory Neural Networks. Advanced Functional Materials, p.2423800.

[4] Falcone, D.F., Clerico, V., Choi, W., Stecconi, T., Horst, F., Bégon‐Lours, L., Galetta, M., La Porta, A., Garg, N., Alibart, F. and Offrein, B.J., 2025. All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices. Advanced Functional Materials, p.2504688.

[5] Choi, W., Stecconi, T., Falcone, D.F., Galetta, M., Clerico, V., Zaccaria, E., Ram, M.S., Porta, A.L., Horst, F., Jubin, D. and Senger, M., 2025. Update Disturbance‐Resilient Analog ReRAM Crossbar Arrays for In‐Memory Deep Learning Accelerators. Advanced Science, p.e04578.

[6] Galetta, M., Falcone, D.F., Menzel, S., La Porta, A., Stecconi, T., Choi, W., Offrein, B.J. and Bragaglia, V., 2024, September. Compact model of conductive-metal-oxide/hfo x analog filamentary reram devices. In 2024 IEEE European Solid-State Electronics Research Conference (ESSERC) (pp. 749-752). IEEE.

[7] Choi, W., Van Bodegraven, T., Verest, J., Maher, O., Falcone, D.F., La Porta, A., Jubin, D., Offrein, B.J., Karg, S., Bragaglia, V. and Todri-Sanial, A., 2025, May. Hardware Implementation of Ring Oscillator Networks Coupled by BEOL Integrated ReRAM for Associative Memory Tasks. In 2025 IEEE International Memory Workshop (IMW) (pp. 1-4). IEEE.

Acknowledgements:

This work is funded by EU within the PHASTRAC grantID: 101092096. The authors also acknowledge the Binnig and Rohrer Nanotechnology Center (BRNC) at IBM Research Europe.

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