Probabilistic computing is a physics-based approach to addressing computational problems that are difficult to solve by conventional von Neumann computers, such as prime factorization (cryptography), MAX-CUT, or the Travelling Salesmen problem among others. A key requirement for p-computing is the implementation of fast, compact, and energy-efficient probabilistic bits (p-bits) that do not rely on pseudo-random number generators, as it is the case of stochastic systems based on CMOS technology. Among the different hardware proposals for p-bits, Magnetic Tunnel junctions (MTJs)1 have emerged as a strong candidate for realizing True Random Number Generators (TRNG). An MTJ is a nanoscale device consisting of two ferromagnetic electrodes separated by a dielectric barrier, which electrical resistance depends on the relative orientation of the magnetization of the ferromagnetic layers (Tunnel Magnetoresistance, TMR). In a technological point of view, MTJs have attracted interest as the fundamental block of Magnetic Random-Access Memories (MRAM), and its potential to integrate new device concepts such as neurons and synapses for Neuromorphic computing, microwave detectors (Spin Diodes)2 or Ising Spins in Ising Machines3.

In this talk, I will show how MTJs implement TNGs, and how we have implemented an stochastic computing scheme based on low energy barrier MTJs with tunable dwell time between states, i.e. Stochastic Computer4. Moreover, I will review an alternative p-bit design based on perpendicular MTJs that exploits the voltage-controlled magnetic anisotropy (VCMA)5 effect to generate the random state of a p-bit on demand, instead of use unstable MTJs. In this approach, the MTJ state is stable (i.e. have large energy barriers) in the absence of applied voltage, while VCMA-induced dynamics are used to generate random numbers in less than 10 ns/bit. A key advantage of VCMA-MTJs is that they do not require a bias current to tune the p-bit output, significantly reducing the impact of device variability across the chip as well as improving the device density. Finally, to demonstrate the feasibility of the proposed p-bits and the high quality of the generated random numbers, I will present a Probabilistic Computer based on VCMA-MTJs able to solve up to 40 bit integer factorization problems by a fully spintronic implementation of a p-bit, and alternatively, by enabling true random number generation at low cost for ultralow-power and compact p-computers implemented in complementary metal-oxide semiconductor chips.