Publication date: 22nd July 2026
Two-dimensional (2D) transition-metal dichalcogenide semiconductors have emerged as promising materials for next-generation electronic and optoelectronic devices. However, scalable integration remains challenging because conventional sputtering processes induce plasma damage that degrades atomically thin materials and hinders reliable metal contact formation. To enable the scalable integration of damage-sensitive semiconductors, including perovskites and 2D materials, plasma-damage-free processing strategies are essential. In this work, we employ an Isolated Plasma Soft Deposition (IPSD) system, in which the plasma generation and deposition regions are spatially separated to minimize energetic particle bombardment during sputtering. [1] This unique deposition mechanism enables (i) the deposition of low-kinetic-energy ultrathin precursor films for the subsequent synthesis of monolayer MoS2 and WS2 and (ii) the deposition of plasma-damage-free Mo contacts electrodes on atomically thin semiconductors. The IPSD-grown ultrathin Mo and WS2-x precursor films were sulfurized at 1000 °C to synthesize monolayer MoS2 and WS2, respectively. Raman and photoluminescence spectroscopy confirmed the formation of monolayer MoS2 and WS2, while cross-sectional TEM revealed monolayer thicknesses of approximately 0.70 and 0.68 nm, respectively. To further evaluate the quality of IPSD-deposited Mo contact electrodes, monolayer MoS2 and WS2 temperature sensors were fabricated using the IPSD system. Unlike conventionally sputtered Mo electrodes, which introduce plasma-induced damage at the metal/semiconductor interface, IPSD-deposited Mo contacts enabled stable operation of both monolayer MoS2 and WS2 temperature sensors by preserving the intrinsic properties of the atomically thin TMD channels. Notably, the monolayer MoS2 temperature sensor exhibited a stable intrinsic negative temperature coefficient response with a high temperature coefficient of resistance (TCR) of ~1.27% °C-1 within the physiologically relevant temperature range of 36–40 °C. These results highlight the potential of IPSD as a scalable platform for the low-damage integration of perovskite-based transport layers and other damage-senseitive semiconductors. [2]
This work was supported by the Technology Innovation Program (2410005224, Development of core materials, devices, and process industry source technologies to secure next-generation OLED pixel process technology) funded By the Ministry of Trade, Industry & Energy(MOTIE, Korea), also this research was supported by the GRRC program of Gyeonggi Province [GRRC Sungkyunkwan 2023-B02].
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