Publication date: 24th July 2026
The rapid growth of artificial intelligence (AI) workloads has intensified the need for computing hardware with greater energy efficiency. Analog in-memory computing has emerged as a promising approach, using cross-point arrays of resistive memory devices to store neural network weights as conductance states and perform vector-matrix multiplication directly where data are stored.
This talk presents electrochemical random-access memory (ECRAM) as a device platform for energy-efficient analog AI accelerators. ECRAM enables gradual and reversible conductance modulation through ion-driven electrochemical switching, providing high programmability, excellent endurance, and low device variability. To understand its switching mechanism at the material level, multi-terminal tungsten oxide-based ECRAM devices are investigated using variable-temperature Parallel Dipole Line (PDL) Hall measurements, which correlate conductance modulation with changes in electronic transport properties.
At the array level, this talk discusses how ECRAM device nonidealities, such as conductance relaxation and weight-update imbalance, affect neural network training. A hardware-aware training strategy is introduced to compensate for these effects by tuning the programming conditions, improving the robustness of ECRAM-based analog AI hardware.
Finally, chip-level implementation is demonstrated using a 64×64 ECRAM cross-point array integrated with peripheral circuits for in-situ neural network training. By combining device-level analysis, array-level optimization, and circuit-integrated hardware demonstration, this work shows a pathway toward practical analog training systems based on ECRAM. Overall, this talk highlights the potential of ECRAM as a key building block for energy-efficient analog AI accelerators.
This work was supported by National R&D Program through the National Research Foundation of Korea (NRF) funded by Ministry of Science and ICT (RS-2024-00405960), K-CHIPS (Korea Collaborative & High-tech Initiative for Prospective Semiconductor Research) (2410010526, 20024760, 23008-45FC) funded by the Ministry of Trade, Industry & Energy (MOTIE, Korea), IC Design Education Center (IDEC), Korea, and Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government (MOTIE) (RS-2024-00401466, HRD Program for Industrial Innovation).
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