The physical properties of the electron transport layer (ETL) significantly affect the ion migration, charge extraction kinetics, and interfacial recombination pathways impacting the current-voltage (I-V) hysteresis in perovskite solar cells (PSCs). For state-of-the-art n-i-p PSCs, tin oxide (SnO₂) is used due to its favourable energy-level alignment, high optical transparency, and low-temperature solution processability. However, the surface chemistry and defect landscape of SnO₂ thin films remain highly sensitive to the precise deposition route and ambient processing conditions. Different deposition routes can introduce microstructural inhomogeneities, pinholes, and deep-level traps at the heterojunction, which directly cause severe variations in device reproducibility and operational stability.

In this work, we present a comparative analysis of distinct SnO₂ ETL architectures to elucidate the ETL/perovskite interfacial chemistry that affects device performance, reproducibility, and stability. Utilising a comprehensive suite of structural, morphological, and optoelectronic characterisations, we probe the subtle differences in film uniformity, surface coverage, and trap-assisted recombination behaviour across the three different configurations. Our results reveal a clear distinction in interfacial contact quality of the ETL/perovskite interface, which heavily modulates the carrier extraction and local charge imbalances. Here, we observe noticeable variations in extraction kinetics and transient characteristics between the different ETL architectures, revealing a profound link between interfacial trap states, ion migration dynamics, and the severity of I-V hysteresis. Crucially, we identify an optimised SnO₂ architecture that exhibits superior interfacial quality, featuring a more favourable energy-level alignment and a reduced density of recombination sites. This refined architecture enables improvement in carrier extraction, resulting in significantly suppressed I-V hysteresis. Furthermore, by preventing mobile ion accumulation and localized capacitive charge build-up at the heterojunction, which are known triggers for both hysteresis and early device degradation, the optimized ETL demonstrates markedly improved steady-state operational stability and excellent process reproducibility. Overall, this comparative study underscores the vital role of ETL deposition routes, offering a clear and reproducible framework toward the rational optimization of low-hysteresis, operationally stable PSCs without relying on complex post-treatment strategies.